1. Field of the Invention
The present invention relates to methods and systems for preparing a sample for thin film analysis. Certain embodiments relate to methods that include modifying an energy beam such that the energy beam has a substantially flat-top profile and directing the energy beam to a sample to remove a contaminant layer on the sample.
2. Description of the Related Art
The following description and examples are not admitted to be prior art by virtue of their inclusion in this section.
As the dimensions of semiconductor devices continue to shrink, accurate and efficient characterization of the components forming those devices becomes more critical. Typically, the manufacturing process for modern semiconductor devices includes the formation of a number of layers or “thin films” on a silicon wafer. The thin films can include oxide, nitride, and/or metal layers, among others. To ensure proper performance of the finished semiconductor devices, the thickness and composition of each thin film formed during the manufacturing process must be tightly controlled.
Modern thin films have reached the point where the accuracy and reproducibility of thin film measurements can be limited by contamination on the surface of the thin film. For example, the absorption of water and other vapors onto the thin film can create a contaminant layer that adversely affects thin film analysis techniques such as optical ellipsometry, optical reflectometry, grazing-incidence x-ray reflectometry (GXR), x-ray fluorescence (XRF), electron microprobe analysis (EMP), and non-contact electrical analysis, all of which operate by directing a probe beam (optical, x-ray, electron, or corona discharge) at the surface of the thin film to be measured. The contaminant layer can also interfere with measurement techniques that physically contact the surface of the thin film, such as contact-based electrical analysis (e.g., spreading resistance analysis).
Conventional methods for cleaning thin films involve heating the entire wafer in an oven to a temperature of about 300° C. to vaporize any contaminant layer. FIG. 1a shows conventional oven-based wafer cleaning system 100a used to prepare wafer 110 for thin film analysis, as described in U.S. Pat. No. 6,325,078 to Kamieniecki, which is incorporated by reference as if fully set forth herein. Wafer 110 includes thin film layer 112 formed on silicon substrate 111, and contaminant layer 113 formed on the surface of thin film layer 112. Wafer cleaning system 100a includes wafer stage 120 and multiple heat lamps 130. Wafer stage 120 positions wafer 110 under heat lamps 130, where thermal radiation from heat lamps 130 heats wafer 110 to vaporize contaminant layer 113. It is believed that this cleaning process is aided by the optical photons from heat lamps 130 effectively breaking bonds between contaminant layer 113 and thin film layer 112.
FIG. 1b shows another conventional wafer cleaning system 100b used to prepare wafer 110 for thin film analysis, as described in U.S. Pat. No. 6,261,853 to Howell et al., which is incorporated by reference as if fully set forth herein. Just as described with respect to FIG. 1a, wafer 110 includes thin film layer 112 formed on silicon substrate 111 and contaminant layer 113 formed on the surface of thin film layer 112. Cleaning system 100b incorporates stage 140 that includes heating element 141. Heat generated by heating element 141 is conducted through stage 140 into wafer 110, thereby providing the heating required to vaporize contaminant layer 113. Heat exchanger 150 coupled to stage 140 captures excess heat from heating element 141, thereby minimizing undesirable heating of cleaning system 100b itself and the surrounding environment.
Although wafer cleaning systems 100a and 100b use different thermal energy sources (i.e., heat lamps 130 and heating element 141, respectively), both systems perform a bulk heating operation to remove contaminant layer 113. The large thermal control components (e.g., lamps, heated stages, heat exchangers, etc.) typically used for bulk wafer heating undesirably increase the cleanroom space required for these conventional cleaning systems. Further exacerbating the problem of excess equipment size, conventional cleaning systems are sometimes stand-alone units used in conjunction with a thin film analysis tool. Therefore, conventional cleaning systems can significantly increase the total footprint required for a complete thin film analysis system. The use of a separate cleaning system also has an adverse effect on throughput, as time must be spent transferring the wafer to and from the cleaning system. In addition, contaminants can redeposit on the cleaned wafer when it is transferred from the cleaning system to the film analysis tool.
In an attempt to somewhat alleviate these equipment size and recontamination problems, attempts have been made to combine wafer cleaning and measurement capabilities in a single tool. For example, the aforementioned U.S. Pat. No. 6,261,853 to Howell et al. describes integrating cleaning system 100b with an existing metrology tool (Opti-Probe 5240 from Therma-Wave, Inc.). Also, the Quantox XP tool from KLA-Tencor integrates a wafer cleaning system similar to cleaning system 100b with a non-contact electrical film measurement system. However, any bulk wafer heating system must still incorporate the aforementioned (large) thermal control components. Furthermore, even if a combined system is used, the bulk heating operation can significantly degrade overall wafer processing throughput. Several seconds are required to heat the wafer to the temperature required for removal of the contaminant layer, and another several seconds are required to cool down the wafer after cleaning. Any wafer handling operations that must be performed during and after the cleaning operation (e.g., transferring the wafer from the cleaning system to the thin film analysis system) further reduce the throughput.
Accordingly, it is desirable to provide an efficient wafer cleaning system for thin film measurement systems that does not require lengthy heating and cooling times, does not require dedicated wafer handling steps, and does not require a substantial footprint.